I am a Staff Research Scientist at Intel, working on advanced wireless and optical technologies for satellite communications. Previously, I took roles as a Postdoctocal Associate (Boston University /MIT), and as a 5G PHY Developer (Octasic Inc). I obtained my Ph.D. from McGill University.
A mix of academic, professional and personal briefs on the most recent milestones.
I will be speaking at NETSA’s BLISS 2024 Summit alongside top business and technology leaders, on the role of AI in the new space race.
Serving at the GLOBECOM 2024 Conference, as Technical Program Chair for Wireless Communications.
Two chapters, featuring our GRAND and ORBGRAND architectures led by S. M. Abbas, is now published in Springer.
The ORBGRAND chip we succesfully fabricated was featured in BU News for its game-changing aspects.
The results of our ORBGRAND chip was featured in WoWMoM 2023, hosted by Northeastern University.
Join me in the panels of Future Networks World Forum 2023, in Baltimore, MD on November 13-15.
The results of our ORBGRAND chip was featured in ISSCC 2023 this week in San Fransisco.
The results of our ORBGRAND chip was featured in MIT News this week.
A core research from my postdoc, "GRAND-EDGE: A Universal, Jamming-resilient Algorithm with Error-and-Erasure Decoding" will be featured at ICC 2023 conference.
Our work has received the Best Demo award at the COMSNETS 2023 Conference, that featured the first soft-decision universal decoder chip in the world.
I will be serving as a Technical Program Chair for the IEEE INFOCOM 2023, on the 5G and Beyond Wireless Security track.
I will be serving as a Technical Program Chair for the Vehicular Technology Conference - Spring 2023, on ML/AI for Communications and Physical Layer Security tracks.
I will be serving as an Associate Editor for the IEEE Communications Letters.
I became a Research Scientist/Engineer at Intel Labs, to work on advanced wireless and optical communication technologies.
I will be serving at the GLOBECOM 2022 Conference, as a session chair for the 5G and Beyond Wireless Security Workshop.
I will be serving as the Lead Guest Editor for the special issue "VLSI Architectures for Wireless Communications and Digital Signal Processing".
Join me in person for the Future Networks World Forum 2022, in Montreal, QC on October 12-14.
The most recent outcome of my postdoctoral work will be featured in GLOBECOM 2022 Workshops on Beyond-5G Wireless Security. Preprint here.
I will be serving as a Technical Program Chair for the Vehicular Technology Conference - Fall 2022, that will take place simultaneously in London, UK and Beijing, China.
I will be serving as the Academia & Industry Demo Chair for the Future Networks World Forum 2022, that will take place in Montreal, QC on October 12-14.
I will be delivering a faculty seminar on my Ph.D. and Postdoctoral research, at Center for Information Systems Engineering of Boston University. Register here.
Our latest paper on efficient hardware implementation of the ORBGRAND algorithm is now published in IEEE Transactions on Very Large Scale Integration Systems.
The extended version of our ICASSP 2021 paper on GRAND is now available as a preprint here.
I will be serving as the Industry Demo/Exhibit Co-Chair for the 5G World Forum 2021, the flagship event of the IEEE Future Networks Initiative. Watch on-demand here.
I will be giving a talk titled "High-Throughput does not Compromise Energy Efficiency: New Algorithms and Implementations for 5G Polar Codes" on May 6, 2021 4 PM EDT. Register here.
Titled "Algorithms and Implementations for Practical and Energy-Efficient Polar Decoders" my thesis is now available at McGill Library Catalogue.
I am thrilled to announce that I was elected for the Vice-Chair role for the IEEE Montreal Section Executive Committee. Exciting days ahead!
I am recently recruited as a DSP Algorithm Developer for Octasic Inc. I will be working on 5G Wireless Protocol Systems from Matlab reference models to optimized embedded C/ASM implementations.
Our paper titled "Practical Dynamic SC-Flip Decoders: Algorithm and Implementation" has been accepted in IEEE Transactions on Signal Processing and available on Early Access.
Our paper titled "High-Throughput VLSI Architecture for GRAND", first-authored by Dr. Syed Mohsin Abbas, has been accepted in IEEE International Workshop on Signal Processing Systems (SiPS) 2020 Virtual Conference.
I will be participating at ICC 2020 as an author of an accepted paper. The conference will be performed virtually due to the COVID-19 pandemic.